Aravindh Kumar, PhD

Senior Engineer (Logic Pathfinding)

Samsung Semiconductor, San Jose


Phone: +1 (650)-272-1873

E-mail: aravindhk947@gmail.com

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About me

I am a Senior Engineer in the Logic Pathfinding Lab at Samsung Semiconductor, San Jose. I am also a Visiting Researcher with the Saraswat group at Stanford University, working on 2D semiconductor research.

Education

  • PhD in Electrical Engineering, Stanford University, June 2022

  • MS in Electrical Engineering, Stanford University, 2018

  • B.Tech. (Honors) in Electrical Engineering, IIT Bombay, 2016

    • Minor degrees in Physics and Computer Science

Research

My research interests include -

  1. Low-resistance contacts to two-dimensional (2D) semiconductors

  2. Doping of 2D Semiconductors

  3. Computational study of metal-semiconductor interfaces

  4. Oxide electronics